Key Specs
| Spec | Value | Condition | Source |
|---|---|---|---|
| Configuration | 2 N-Channel (Dual) | Digi-Key | |
| Current Continuous Drain ID 25 C | 320mA | Digi-Key | |
| Drain-source Voltage (Max) | 60V | Digi-Key | |
| FET Feature | Logic Level Gate | Digi-Key | |
| Gate Charge Qg Max VGS | 0.8nC @ 4.5V | Digi-Key | |
| Grade | Automotive | Digi-Key | |
| Input Capacitance Ciss Max VDS | 50pF @ 10V | Digi-Key | |
| Mounting Type | Surface Mount | Digi-Key | |
| Operating Temperature Range | 150°C (TJ) | Digi-Key | |
| Package Case | 6-TSSOP, SC-88, SOT-363 | Digi-Key | |
| Power (Max) | 420mW | Digi-Key | |
| Qualification | AEC-Q100 | Digi-Key | |
| RDS On Max ID VGS | 1.6Ohm @ 500mA, 10V | Digi-Key | |
| Supplier Device Package | 6-TSSOP | Digi-Key | |
| Technology | MOSFET (Metal Oxide) | Digi-Key | |
| VGS Th Max ID | 2.4V @ 250µA | Digi-Key |
When To Use
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Battery-powered automotive sensor switch @ 12V, 300mA: The 60V drain-source rating and AEC-Q100 qualification ensure robust operation under automotive transient conditions and temperature extremes up to 150°C junction. Using a MOSFET with lower voltage margin risks avalanche breakdown during load dump or switching spikes.
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Level shifting and signal switching at 5V logic interface, <320mA: The logic-level gate threshold max of 2.4V @ 250µA enables direct drive from standard 3.3V or 5V MCUs without additional gate drivers, minimizing BOM and complexity. A device without logic-level gates would fail to fully turn on, causing excessive conduction loss and thermal runaway.
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Low-current load switch in a 24V industrial control line: The 1.6Ω Rds(on) @ 500mA and 420mW max power dissipation allow reliable switching of small loads with minimal heating in compact surface-mount packages. Using a general-purpose MOSFET without guaranteed low Rds(on) at logic gate drive risks shoot-through losses and thermal instability.
When Not To Use
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High current motor driver (>1A): The 320mA continuous drain current rating is insufficient for motor stall or peak currents. Use a high-current synchronous buck with external FETs that can handle higher transient and continuous currents with adequate MOSFET sizing.
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Switching power supply running at 1MHz: The gate charge of 0.8nC @ 4.5V and input capacitance of 50pF limit switching speed and drive efficiency at frequencies above 500kHz. Use a high-frequency buck controller optimized for low gate charge and fast switching to reduce losses.
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Battery-powered sensor with μA quiescent load: The device’s gate leakage and continuous conduction current are not optimized for ultra-low quiescent current. Use a low-IQ PFM buck regulator designed for minimal standby power consumption.
Application Notes
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The dual N-channel MOSFET structure shares a common substrate; avoid connecting sources or drains across devices without careful isolation to prevent latch-up or unintended conduction.
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Gate pins are especially noise-sensitive (pins 2 and 5); route gate traces away from high-current switching nodes (SW) to prevent false triggering or oscillation.
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The small 6-TSSOP package requires careful thermal pad design; use a low-inductance ground plane beneath the device to ensure effective heat dissipation and minimize parasitic inductance.
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Avoid long gate drive lines; keep gate drivers close to pins with minimal series resistance to maintain fast switching and reduce EMI.
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Guard routing around the gate traces is recommended to shield against capacitive coupling from noisy power lines, especially in automotive environments.
Gotchas
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[Gate threshold vs. load current mismatch]: Designers often assume the 2.4V max gate threshold at 250µA scales linearly to higher load currents, but the Rds(on) at 500mA is 1.6Ω, which can cause significant voltage drop and heating if gate drive voltage is marginal. Result: MOSFET partially on, causing elevated junction temperature and eventual thermal runaway. Fix: Verify gate drive voltage under load and confirm Rds(on) at intended current; use a dedicated gate driver or higher gate voltage if possible.
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[Parasitic capacitance-induced switching delay]: The specified 50pF input capacitance at 10V can combine with long PCB traces or high-impedance gate drive to slow switching transitions, causing increased switching losses and potential EMI spikes observable as ringing on the drain waveform. Fix: Minimize gate trace length and add a low-value gate resistor (<10Ω) to damp oscillations and speed transitions.
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[Thermal derating above 150°C junction]: Although the device is rated to 150°C TJ, real-world PCB design without adequate copper area or thermal vias can cause localized hotspots exceeding this, leading to drift in Rds(on) and premature failure. Fix: Conduct thermal imaging during prototyping and design copper pours and vias to keep junction temperature below 125°C under worst-case conditions.
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[Dual MOSFET substrate coupling]: Using both transistors in the 2N7002PS,115 package for independent switching without substrate bias can cause unintended conduction paths, observable as cross-conduction or increased leakage current at low drain voltages. Fix: Tie substrate to the lowest potential node or configure devices in applications where the substrate connection is common and accounted for.