Key Specs
| Spec | Value | Condition | Source |
|---|---|---|---|
| FET Type | N-Channel | Digi-Key | |
| Technology | SiCFET (Silicon Carbide) | Digi-Key | |
| Drain-source Voltage (Max) | 400 V | Digi-Key | |
| Current Continuous Drain ID 25 C | 13.4A (Ta), 144A (Tc) | Digi-Key | |
| Drive Voltage Max RDS On Min RDS On | 15V, 18V | Digi-Key | |
| RDS On Max ID VGS | 14.4mOhm @ 37.1A, 18V | Digi-Key | |
| VGS Th Max ID | 5.6V @ 13.3mA | Digi-Key | |
| Gate Charge Qg Max VGS | 85 nC @ 18 V | Digi-Key | |
| Gate-source Voltage (Max) | +23V, -7V | Digi-Key | |
| Input Capacitance Ciss Max VDS | 3770 pF @ 200 V | Digi-Key | |
| FET Feature | - | Digi-Key | |
| Power Dissipation (Max) | 3.8W (Ta), 429W (Tc) | Digi-Key | |
| Operating Temperature Range | -55°C ~ 175°C (TJ) | Digi-Key | |
| Grade | - | Digi-Key | |
| Qualification | - | Digi-Key | |
| Mounting Type | Surface Mount | Digi-Key | |
| Supplier Device Package | PG-HSOF-8-2 | Digi-Key | |
| Package Case | 8-PowerSFN | Digi-Key |
When To Use
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400 V bus → 48 V @ 10 A: The 400 V drain-source rating provides ample margin for high-voltage bus conversion with transient spikes. This SiCFET’s low R_DS(on) of 14.4 mΩ at 37 A and high continuous current rating (13.4 A at Ta, 144 A at Tc) prevent thermal runaway in demanding power stages, unlike standard silicon MOSFETs which could overheat or latch-up under such stress.
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High-frequency (up to 400 kHz) synchronous buck stage: The gate charge of 85 nC at 18 V and fast switching speed (4,000 A/μs typical) enable efficient switching at high frequency without excessive gate drive losses. Using a MOSFET with slower switching or higher gate charge would increase switching losses and risk shoot-through due to slower gate transitions.
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Automotive powertrain inverter stage operating to 175°C junction: The wide operating junction temperature range (-55°C to 175°C) supports harsh environments and elevated temperature operation. Standard MOSFETs rated only to 125°C risk premature failure or thermal runaway in these conditions.
When Not To Use
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Output current > 144 A continuous: The max continuous drain current at case temperature is 144 A; pushing beyond risks device degradation or failure. Use a high-current synchronous buck with external FETs to distribute current and improve thermal management.
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Low-voltage, low dropout linear regulation (<1 V differential): The R_DS(on) and gate threshold voltage are optimized for switching at 400 V range, not low dropout linear regulation. Use an LDO regulator to achieve low noise and low dropout voltage without excessive dissipation.
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Switching frequency > 500 kHz: While 400 kHz is supported, frequencies beyond 500 kHz risk excessive switching losses due to the 85 nC gate charge and gate drive voltage. Use a high-frequency buck controller designed explicitly for >500 kHz operation with optimized gate drivers and lower gate charge FETs.
Application Notes
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The switching node (SW) exhibits high dV/dt and dI/dt during transitions; keep gate drive loop inductance minimal by routing gate and source traces tightly coupled and close to the driver.
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the Gate pin and the Source pin are noise-sensitive; use local gate drive resistors and minimize parasitic inductance to avoid oscillations or false triggering.
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The recommended gate drive voltage is 18 V typical, with maximum gate-source voltage of +23 V and minimum -7 V; ensure gate drive circuitry respects these limits to avoid gate oxide damage.
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Ground planes should be solid and connected directly to the source pin to minimize ground bounce and improve thermal conduction.
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Guard routing for the drain and source pins should isolate the high-voltage drain from sensitive control signals to prevent capacitive coupling and false switching events.
Gotchas
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[Underestimating transient thermal impedance during pulsed operation]: Designers often rely on continuous power dissipation ratings (3.8 W at Ta, 429 W at Tc) but neglect the transient thermal impedance max of 0.01 W/K, causing underestimated junction temperature spikes during short pulses. This leads to premature device degradation or erratic switching behavior under pulse loads. Fix by measuring junction temperature during pulse conditions or derating pulse power using transient thermal impedance curves.
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[Gate drive voltage overshoot beyond +23 V max]: Some gate drivers or bootstrap circuits exceed the +23 V absolute maximum gate-source voltage during switching, causing gate oxide stress and eventual failure. Symptoms include increased gate leakage and device instability. Fix by adding gate voltage clamps or selecting gate drivers with built-in voltage limiting.
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[Layout-induced high dv/dt coupling causing false turn-on]: Long or looped gate drive traces combined with high dV/dt at the drain can induce Miller currents that falsely turn the device on, risking shoot-through in synchronous topologies. This may appear as voltage spikes or oscillations on the gate waveform. Fix by minimizing gate loop area, adding a small gate resistor (e.g., 5–10 Ω), and using Kelvin source sensing if possible.
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[Assuming threshold voltage at room temperature applies at 175°C]: The gate threshold voltage max is 5.6 V at 25°C, but V_TH drops significantly at elevated temperatures, potentially causing unintended conduction or leakage at idle. This can cause increased standby losses or reduced efficiency. Fix by characterizing gate threshold shift over temperature and ensuring gate drive signals maintain full enhancement margin at maximum operating junction temperature.