Key Specs
| Spec | Value | Condition | Source |
|---|---|---|---|
| Configuration | 2 N-Channel (Dual) | Digi-Key | |
| Current Continuous Drain ID 25 C | 2.7A | Digi-Key | |
| Drain-source Voltage (Max) | 20V | Digi-Key | |
| FET Feature | - | Digi-Key | |
| Gate Charge Qg Max VGS | 5nC @ 4.5V | Digi-Key | |
| Input Capacitance Ciss Max VDS | 310pF @ 10V | Digi-Key | |
| Mounting Type | Surface Mount | Digi-Key | |
| Operating Temperature Range | -55°C ~ 150°C (TJ) | Digi-Key | |
| Package Case | SOT-23-6 Thin, TSOT-23-6 | Digi-Key | |
| Power (Max) | 700mW | Digi-Key | |
| RDS On Max ID VGS | 80mOhm @ 2.7A, 4.5V | Digi-Key | |
| Supplier Device Package | SuperSOT™-6 | Digi-Key | |
| Technology | MOSFET (Metal Oxide) | Digi-Key | |
| VGS Th Max ID | 1.5V @ 250µA | Digi-Key |
When To Use
Use the FDC6305N in low-voltage, low-current switching applications where a compact dual N-channel MOSFET is needed, such as load switches or small DC-DC converters operating at or below 20V drain-source voltage. Its low Rds(on) of 80mΩ at 2.7A and 4.5V gate drive makes it suitable for efficient power switching in space-constrained designs requiring surface-mount SuperSOT™-6 packages.
When Not To Use
Do not use the FDC6305N in high-current or high-voltage applications exceeding 2.7A continuous drain current or 20V drain-source voltage, such as power supplies for motors or high-power LED drivers. Instead, select MOSFETs with higher current ratings and voltage margins to ensure reliability and prevent device failure.
Application Notes
The drain pins switch and should be routed with the smallest possible loop area to minimize parasitic inductance and switching noise. The gate pins are noise-sensitive; use short, low-inductance gate drive traces to ensure stable switching. Given the maximum power dissipation of 700mW and package thermal characteristics, a heatsink is generally not required at typical operating points within the specified temperature range (-55°C to 150°C TJ), but ensure adequate PCB copper area for heat dissipation in continuous high-current operation.
Gotchas
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[Ignoring TJ derating at high ambient]: Designers often size the MOSFET for 700mW max power dissipation without accounting for PCB thermal resistance or ambient temperature. This causes junction temperature to exceed 150°C silently, leading to accelerated device degradation or sudden failure. Fix: Perform thermal resistance measurements on the actual board and verify TJ stays below 150°C under worst-case load.
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[Gate drive overshoot due to long gate traces]: The low gate charge enables fast switching but also makes the gate voltage susceptible to ringing if gate drive traces are too long or have high inductance. This can cause erratic switching behavior or partial turn-on, visible as unstable SW node waveforms on scope. Fix: Keep gate drive traces <10mm, add small gate resistors (5–10Ω) to damp oscillations.
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[Assuming dual MOSFETs can be paralleled externally]: The device integrates two N-channels internally balanced; attempting to parallel multiple FDC6305N devices for higher current often causes uneven current sharing and hot spots due to package thermal limits. Fix: Use a single device within its 2.7A rating or switch to a module designed for parallel operation.
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[Startup with no minimum load]: At very light or no load, the reduced conduction in the MOSFET channels can cause insufficient switching node voltage to maintain stable gate drive, resulting in intermittent oscillations or incomplete turn-on. Fix: Add a small bleed resistor or minimum load to ensure stable switching transitions during startup and light-load conditions.