Key Specs
| Spec | Value | Condition | Source |
|---|---|---|---|
| Current Continuous Drain ID 25 C | 350mA (Ta) | Digi-Key | |
| Drain-source Voltage (Max) | 30 V | Digi-Key | |
| Drive Voltage Max RDS On Min RDS On | 2.5V, 10V | Digi-Key | |
| FET Feature | - | Digi-Key | |
| FET Type | N-Channel | Digi-Key | |
| Gate Charge Qg Max VGS | 0.9 nC @ 10 V | Digi-Key | |
| Gate-source Voltage (Max) | ±20V | Digi-Key | |
| Grade | - | Digi-Key | |
| Input Capacitance Ciss Max VDS | 23.2 pF @ 25 V | Digi-Key | |
| Mounting Type | Surface Mount | Digi-Key | |
| Operating Temperature Range | -55°C ~ 150°C (TJ) | Digi-Key | |
| Package Case | TO-236-3, SC-59, SOT-23-3 | Digi-Key | |
| Power Dissipation (Max) | 350mW (Ta) | Digi-Key | |
| Qualification | - | Digi-Key | |
| RDS On Max ID VGS | 2.8Ohm @ 250mA, 10V | Digi-Key | |
| Supplier Device Package | SOT-23-3 | Digi-Key | |
| Technology | MOSFET (Metal Oxide) | Digi-Key | |
| VGS Th Max ID | 1.5V @ 250µA | Digi-Key |
When To Use
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3.3V low-current switching regulator @ 300mA: The 30V drain-source max rating and 2.8Ω max RDS(on) at 10V gate drive ensure safe operation with a moderate input voltage and light load currents without excessive conduction losses. Using a synchronous buck controller with external MOSFETs risks shoot-through or complexity that this integrated device avoids in low-power designs.
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Battery-powered boost converter with ≤3A peak current: The 2.78A max drain current at VGS=10V and low total gate charge (0.9 nC max) allow efficient switching at moderate frequencies with minimal gate drive losses. A linear regulator would suffer from thermal runaway at these currents due to power dissipation, while a multi-phase buck controller is overkill for this power level.
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Reverse-polarity protected load switch: The built-in body diode with typical forward voltage around 1.2V and max 1.2V ensures predictable diode conduction during reverse polarity or load dump events. Using a device without a robust intrinsic diode could lead to latch-up or device destruction under transient reverse current conditions.
When Not To Use
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High current DC-DC >5A output: The max continuous drain current of 350mA and max 2.8Ω RDS(on) at 10V gate drive are insufficient to handle high output currents. Use a high-current synchronous buck with external FETs for lower conduction losses and proper thermal management.
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Compact high-frequency switching >500kHz: The relatively high total gate charge (0.9 nC max) and moderate switching times (turn-off delay 11.4 ns max) limit efficiency and switching speed in high-frequency designs. Use a high-frequency buck controller designed specifically for fast gate drive and low gate charge.
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Low dropout linear regulation with noise-sensitive analog loads: The max drain-source voltage of 30V and gate threshold voltage range (0.8V–1.5V) make this MOSFET unsuitable for very low dropout operation or low noise analog supplies. Use an LDO regulator if the input-output differential is below 1V and noise is critical.
Application Notes
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The switching node (SW) must have minimal parasitic inductance and be routed with a solid ground return to reduce voltage overshoot caused by the body diode conduction during switching transitions.
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Pins connected to the gate require careful routing with a low-impedance drive path to minimize gate resistance effects, especially since the maximum gate resistance is 79.9Ω; excessive PCB trace or connector resistance will degrade switching speed.
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The body diode forward voltage variation (0.8V min to 1.2V max) means that in synchronous rectification or reverse conduction scenarios, the conduction losses can vary significantly; layout should ensure adequate heat spreading.
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Guard routing around the gate pin is recommended to prevent capacitive coupling to noisy switching nodes, especially since the input capacitance can reach 23.2 pF at 25 V.
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The maximum junction temperature of 150°C requires careful thermal design; ensure that the PCB copper area under the SOT-23-3 package provides sufficient heat sinking to avoid derating under continuous load.
Gotchas
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[Underestimating gate resistance impact]: Designers often assume the gate resistance max spec (79.9Ω) is internal only and neglect PCB trace and connector resistance. This leads to slowed turn-on/off transitions visible as excessive switching losses and ringing on the drain waveform.
Fix: Measure total gate drive loop resistance including PCB and connectors; keep combined resistance below 80Ω to meet switching time specs. -
[Ignoring body diode forward voltage variability]: The diode forward voltage can vary from 0.8V to 1.2V, which can cause unexpected heating or voltage spikes during reverse conduction in low-side synchronous switch applications.
Fix: Characterize the diode conduction in your load conditions and include margin in thermal design and snubber circuits. -
[Assuming low gate charge at all VGS]: The maximum gate charge of 0.9 nC is specified at 10 V gate drive, but at lower gate voltages near threshold, the device may switch partially or slow, causing higher losses and potential shoot-through in synchronous topologies.
Fix: Ensure gate drive voltage is at least 10 V or design the gate driver to fully saturate the MOSFET. -
[Startup with no load causing oscillation]: At very light or no load, the low continuous drain current rating (350mA at 25°C) combined with the device’s input and output capacitances can cause oscillations or erratic switching in quasi-resonant or hysteretic regulators.
Fix: Add a minimum load resistor or implement soft-start sequencing to prevent oscillations during startup.