Key Specs

SpecValueConditionSource
Configuration2 N-Channel (Dual)Digi-Key
Current Continuous Drain ID 25 C200mADigi-Key
Drain-source Voltage (Max)30VDigi-Key
FET FeatureLogic Level GateDigi-Key
Gate Charge Qg Max VGS0.44nC @ 4.5VDigi-Key
Input Capacitance Ciss Max VDS13pF @ 10VDigi-Key
Mounting TypeSurface MountDigi-Key
Operating Temperature Range-55°C ~ 150°C (TJ)Digi-Key
Package CaseSOT-563, SOT-666Digi-Key
Power (Max)375mWDigi-Key
RDS On Max ID VGS4.5Ohm @ 100mA, 10VDigi-Key
Supplier Device PackageSOT-666Digi-Key
TechnologyMOSFET (Metal Oxide)Digi-Key
VGS Th Max ID1.5V @ 250µADigi-Key

When To Use

Use the NX3020NAKV,115 in low-power, compact surface-mount applications requiring a dual N-Channel MOSFET with a maximum drain-source voltage of 30 V and continuous drain current up to 200 mA at 25°C. It is suitable for signal switching, level shifting, and load switching in portable electronics or automotive sensor interfaces where the operating temperature range from -55°C to 150°C is critical. Its logic-level gate drive and low input capacitance (typical 10 pF) make it ideal for circuits powered by low-voltage microcontrollers or logic circuits.

When Not To Use

Do not use the NX3020NAKV,115 in high-current power applications exceeding 200 mA continuous drain current or where a higher breakdown voltage than 30 V is required. For such cases, choose a MOSFET with a higher current rating and voltage capability to avoid device failure. Also, avoid use in applications requiring very low on-resistance below the specified 4.5 Ω at 100 mA and 10 V gate drive, as this device’s R_DS(on) may limit efficiency in power conversion or motor drive applications.

Application Notes

When implementing the NX3020NAKV,115, ensure the drain node switching the load current has the smallest possible loop area to minimize parasitic inductance and switching noise. The gate pin is noise-sensitive; use a short and low-inductance gate drive trace to prevent false triggering or oscillations. At typical operating points near 200 mA continuous current and 30 V drain-source voltage, a heatsink is generally not required due to the maximum power dissipation of 375 mW and thermal impedance of 25 K/W. However, verify junction temperature does not exceed 150°C under worst-case conditions. Use proper PCB layout techniques to optimize thermal and electrical performance.

Gotchas

  1. [Threshold voltage shift with temperature]: The typical Vth of 2.0 V can shift significantly as junction temperature approaches 150 °C, causing partial or incomplete MOSFET turn-on. This results in increased Rds(on), excessive heat generation, and potential thermal runaway.
    Fix: Measure on-state voltage drop at maximum operating temperature in your application, not just room temperature, and adjust gate drive voltage or use thermal derating accordingly.

  2. [Cross-conduction in dual MOSFET configuration]: Assuming both N-channels can be driven independently without dead time can cause shoot-through currents due to insufficient gate drive timing overlap protection. This manifests as sudden current spikes and high switching losses.
    Fix: Implement careful dead-time control in the gate drive signals and verify with an oscilloscope during switching transitions.

  3. [Leakage current increase at high temperature]: Leakage current rises to approximately 10 µA at 150 °C, which may be overlooked in low-leakage applications. This can cause unexpected bias currents or false triggering in sensitive analog circuits.
    Fix: Include leakage current margin in the design and verify in worst-case thermal conditions.

  4. [Gate drive voltage limits]: The maximum gate-source voltage rating of ±20 V is sometimes misapplied as a continuous operating voltage. Exceeding 10 V gate drive or exposing the gate to ringing beyond this can damage the gate oxide without immediate failure.
    Fix: Use a gate drive voltage limited to 4.5–10 V with a robust gate resistor and snubber network to clamp voltage spikes during switching.