Key Specs
| Spec | Value | Condition | Source |
|---|---|---|---|
| Applications | Synchronous Buck Converters | Digi-Key | |
| Current Output Channel | 75A | Digi-Key | |
| Current Peak Output | 105A | Digi-Key | |
| Fault Protection | Shoot-Through | Digi-Key | |
| Features | Bootstrap Circuit | Digi-Key | |
| Interface | PWM | Digi-Key | |
| Load Type | Inductive, Capacitive | Digi-Key | |
| Mounting Type | Surface Mount | Digi-Key | |
| Operating Temperature Range | -40°C ~ 125°C (TJ) | Digi-Key | |
| Output Configuration | Half Bridge (3) | Digi-Key | |
| Package Case | 12-PowerTFDFN | Digi-Key | |
| RDS On (Typ) | - | Digi-Key | |
| Supplier Device Package | 12-VSON-CLIP (5x6) | Digi-Key | |
| Technology | Power MOSFET | Digi-Key | |
| Voltage Load | 4.5V ~ 16V | Digi-Key | |
| Voltage Supply | 4.5V ~ 5.5V | Digi-Key |
When To Use
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12V automotive rail → 1.8V @ 75A: The 16 V maximum input supply voltage and 75 A continuous output current rating match typical automotive POL conditions with ample margin for load transients. Using a part with lower voltage rating risks breakdown during load dump events, causing catastrophic device failure.
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High-frequency server VRM → 1.8V @ 75A: The 1.25 MHz maximum switching frequency supports dense, low-inductance PCB layouts for server CPU core voltages. A synchronous buck controller without integrated bootstrap and shoot-through protection might suffer from shoot-through events at these frequencies, causing thermal runaway.
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Network communication POL → 5.5V @ 75A: The integrated bootstrap switch and optimized dead time for shoot-through protection ensure reliability under high-current transient loads typical in network POLs. Using a discrete FET stage without temperature-compensated bidirectional current sensing risks latch-up and inaccurate current monitoring, degrading system stability.
When Not To Use
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> 75A continuous current loads: The continuous output current max of 75 A limits this part. For currents beyond this rating, use a high-current synchronous buck with external FETs to distribute losses and maintain efficiency without risking thermal runaway.
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Input voltage rails above 16 V: The 16 V max input supply voltage disqualifies this device for higher-voltage rails. Employ a synchronous buck controller designed for higher voltage operation to avoid device breakdown.
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Sub-1V output with ultra-low noise demands: The output voltage typ of 1.8 V and switching nature may introduce noise incompatible with sensitive analog loads. Use an LDO regulator for low dropout and minimal output noise when input-output differential is small and noise sensitivity is high.
Application Notes
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The switching node (SW) must be routed with minimal loop area to reduce EMI; keep the high di/dt current path short and wide. Thermal pads must be soldered fully to the PCB for effective heat dissipation.
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Pins associated with PWM input (tri-state PWM input) and analog temperature output are noise sensitive; route these traces away from high-current switching nodes and provide local filtering or shielding if possible.
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The integrated bootstrap circuit requires the bootstrap capacitor to be placed as close as possible to the device pins to minimize voltage drops and switching losses.
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The exposed tiebar features vary; verify mechanical compatibility with the PCB land pattern per ASME Y14.5M dimensioning to avoid solder joint reliability issues.
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The device’s temperature-compensated bi-directional current sense output requires stable reference and low-noise layout to ensure accurate current monitoring and fault detection.
Gotchas
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[Bootstrap undervoltage during startup]: Assuming the internal bootstrap switch alone will maintain proper high-side drive voltage without an external bootstrap capacitor can cause the high-side MOSFET to fail to turn on, resulting in the half-bridge stuck in low-side conduction or shoot-through. This manifests as erratic switching waveforms and reduced output voltage. Fix by always including a correctly sized bootstrap capacitor close to the device and verifying bootstrap node voltage during startup.
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[Thermal pad soldering skipped or partial]: Omitting full soldering of the package thermal pads or using insufficient via stitching causes poor thermal conduction, leading to localized hotspot formation and early junction overheating. Symptoms include sudden thermal shutdown or device degradation after prolonged high-current operation. Fix by following the mandatory thermal pad soldering guidelines with appropriate PCB thermal vias and solder coverage.
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[Fault monitoring misread due to noisy layout]: Routing the analog temperature output or current sense pins near the switching node (SW) or high di/dt loops can induce noise spikes, causing false fault triggers or incorrect temperature readings during normal operation. This leads to unexpected shutdowns or system instability. Fix by separating these signals physically and adding local decoupling or filtering capacitors.
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[Minimum PWM on-time exactly at limit]: Designing PWM signals with on-times at the 20 ns minimum can cause incomplete MOSFET gate charging and partial conduction, resulting in increased losses and erratic output voltage ripple. This subtle timing constraint is often overlooked. Fix by designing for PWM on-times comfortably above 20 ns, confirming via gate drive waveform measurements.