Key Specs
| Spec | Value | Condition | Source |
|---|---|---|---|
| Output Type | Transistor Driver | Digi-Key | |
| Function | Step-Up/Step-Down | Digi-Key | |
| Output Configuration | Positive | Digi-Key | |
| Topology | Flyback | Digi-Key | |
| Number Of Outputs | 1 | Digi-Key | |
| Output Phases | 1 | Digi-Key | |
| Supply Voltage (Typ) | 9V ~ 18V | Digi-Key | |
| Switching Frequency (Typ) | Up to 1MHz | Digi-Key | |
| Duty Cycle (Max) | 96% | Digi-Key | |
| Synchronous Rectifier | No | Digi-Key | |
| Clock Sync | Yes | Digi-Key | |
| Serial Interfaces | - | Digi-Key | |
| Control Features | Frequency Control | Digi-Key | |
| Operating Temperature Range | -40°C ~ 125°C (TA) | Digi-Key | |
| Grade | Automotive | Digi-Key | |
| Qualification | AEC-Q100 | Digi-Key | |
| Mounting Type | Surface Mount | Digi-Key | |
| Package Case | 8-SOIC (0.154”, 3.90mm Width) | Digi-Key | |
| Supplier Device Package | 8-SOIC | Digi-Key |
When To Use
-
9V to 18V input → 12V @ 4A flyback converter: The 20 V absolute maximum input voltage and ±1 A peak gate drive current enable direct driving of large MOSFETs in isolated or non-isolated flyback topologies up to 1 MHz switching frequency. Using a synchronous buck controller here would fail due to the flyback topology requirements and lack of galvanic isolation capability.
-
Automotive 12V system with high transient immunity: The AEC-Q100 qualification and ±2 kV HBM ESD rating ensure reliable operation in harsh automotive environments with load-dump and ESD events. A generic low-IQ PFM buck controller would not meet these automotive-grade specifications, risking latch-up or early failure.
-
High-frequency flyback with optocoupler feedback at 1 MHz: The integrated frequency control and cycle-by-cycle overcurrent limiting with 35 ns response enable precise regulation and protection at switching frequencies up to 1 MHz. A low-frequency buck controller would not handle 1 MHz switching, causing excessive switching losses and thermal runaway.
When Not To Use
-
Output current demand above 4A continuous: Peak output current capability is ±1 A, which limits the ability to drive external MOSFETs for higher currents. Use a multi-phase buck controller instead to distribute thermal and current stress across multiple phases.
-
Applications requiring synchronous rectification for efficiency: This part has no synchronous rectifier capability, so diode conduction losses will reduce efficiency in low-voltage, high-current applications. Use a synchronous buck controller to eliminate diode losses.
-
Battery-powered systems with ultra-low quiescent current requirements: The typical operating current is 2.3 mA and standby current minimum is 50 μA, which is high for battery-powered or coin cell applications. Use a low-IQ PFM buck instead to extend battery life.
Application Notes
-
The switching node (SW) must be routed with minimal parasitic inductance and kept short to reduce voltage overshoot and ringing, which can trigger false overcurrent events or degrade efficiency.
-
Pins associated with the feedback (FB) and error amplifier reference (VREF) are noise-sensitive; keep their traces short, thick, and away from noisy switching nodes or high-current traces to prevent erratic loop behavior.
-
The internal gate driver output can source and sink up to ±1 A peak; include a gate resistor (typical 10 Ω) close to the MOSFET gate to damp switching transients and prevent oscillations.
-
The UVLO thresholds (typical turn-on 14.5 V, turn-off 9 V) require a clean, stable supply ramp; noisy or slow startup ramps can cause multiple on/off cycles during startup, increasing stress on components.
-
Optocoupler feedback connections to VREF and FB must be carefully designed with proper biasing and pull-down resistors to ensure the outer voltage loop functions correctly without oscillation.
Gotchas
-
[UVLO threshold and supply sequencing]: Assuming the device will start cleanly with any slow rising supply voltage can cause repeated on/off cycling near the 7 V to 15 V range due to hysteresis in the UVLO thresholds. This results in output voltage ripple and increased stress on external components. Fix: Use a supply ramp generator or add a dedicated UVLO supervisor with controlled hysteresis to ensure monotonic startup.
-
[Feedback loop instability from long, thin PCB traces]: Routing the FB and VREF traces with excessive length or narrow width increases noise susceptibility, causing loop oscillations or erratic regulation under load transients. Fix: Keep feedback traces short and wide; use ground guard traces and place compensation components close to the IC.
-
[Using low-ESR bulk capacitors only]: Relying solely on ceramic capacitors with very low ESR on the bulk input can cause high-frequency switching noise to reflect as voltage spikes on the input line, triggering false overcurrent trips or damaging MOSFETs. Fix: Include a small amount of ESR in the bulk capacitor bank (e.g., a polymer or tantalum capacitor in parallel) to dampen high-frequency ringing.
-
[Neglecting minimum off-time at high duty cycles]: Operating near the 96% maximum duty cycle without accounting for minimum off-time and switching transitions can cause the PWM comparator to misfire or the gate driver to saturate, leading to shoot-through or MOSFET overheating. Fix: Verify timing and duty cycle margins during design; implement cycle-by-cycle current limiting and ensure proper gate resistor sizing to maintain clean switching edges.