Key Specs
No verified spec values available.
When To Use
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5V to 3.3V @ 500mA low-noise precision supply: The low noise floor of 0.8µVRMS over 10Hz to 100kHz combined with excellent ripple rejection (up to 117dB at 120Hz) enables ultra-clean rails for sensitive analog or RF front ends. Switching regulators typically introduce switching noise and require complex filtering, resulting in higher output noise and potential signal integrity issues.
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Battery-powered instrumentation with 2V to 5V input range, 100mA load: The low dropout voltage of 260mV (typ) and minimum load of 10µA allow operation close to battery voltage, maximizing runtime. Switching regulators with minimum load requirements or higher dropout voltages risk premature brownout or unstable regulation as the battery discharges.
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Precision reference for DAC or ADC power at 500mA peak current: The tight output voltage tolerance (±1mV typ offset) and stable output impedance support high accuracy conversion stages. Switching supplies can cause output voltage ripple that degrades ADC linearity or DAC accuracy due to their inherent switching noise and transient response.
When Not To Use
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High-current (>1A) power rail: The maximum output current of 500mA disqualifies this device. Use a high-current synchronous buck with external FETs to safely deliver higher currents with proper thermal and electrical headroom.
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Battery-powered sensor node requiring ultra-low quiescent current: The typical quiescent current of 10µA is too high for multi-year battery life in μA-class sleep modes. Use a low-IQ PFM buck designed specifically for minimal standby current.
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Step-down from >20V input or high input-to-output differential: With a maximum input voltage of 20V and internal current limit decreasing above 12V differential, this device is unsuitable for high-voltage rails. Use a synchronous buck controller that can handle higher input voltages and manage efficiency across wide input ranges.
Application Notes
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Place the 10µF output capacitor as close to the OUT and GND pins as possible; ESL should be below 2nH and ESR under 20mΩ for stable loop compensation and noise suppression. Larger ceramic capacitors in 1210 case size are recommended for low piezoelectric noise.
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The SET pin requires a low-ESR capacitor (max 4.7µF typ, up to 22µF for ultralow noise) to stabilize the internal current reference and minimize noise; avoid long traces or high-inductance routing to this pin.
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Enable/UVLO pin hysteresis is fixed at 130mV, so design the input threshold and supply sequencing to avoid oscillations near the turn-on threshold of 1.24V.
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The exposed pad (typ 2.845mm × 4.039mm) must be soldered directly to a PCB copper area with thermal vias if possible to ensure junction-to-ambient thermal resistance remains near the typical 35°C/W. Lack of thermal vias can cause junction temperature to rise above limits at maximum load.
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Ground routing should be star-connected and low-inductance, especially around the ILIM and PGFB pins, to prevent false triggering of current limit or power good faults due to noise coupling.
Gotchas
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[Minimum Load Current Ignored]: Designers sometimes assume zero load is acceptable, but the minimum load required is 10µA. Without this, output voltage can rise above regulation causing overshoot or oscillation at startup. Measure load current during bring-up and ensure a bleed resistor or active load maintains at least 10µA.
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[SET Pin Capacitor ESR and Size]: Using a capacitor with high ESR or significantly oversized capacitance (>22µF) on the SET pin can cause instability or excessive start-up delay. This manifests as slow ramp or output voltage overshoot. Use a ceramic capacitor with ESR <20mΩ and keep capacitance within recommended range.
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[Thermal Dissipation Underestimated on Poor Layout]: Without thermal vias or adequate copper area under the exposed pad, the junction temperature rises rapidly even below max current rating, leading to thermal shutdown or reduced reliability. Verify thermal resistance with board copper and use thermal imaging to confirm.
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[ILIM Pin Voltage Misapplication]: Applying an ILIM pin voltage outside −0.3V to +1V range or miscalculating the programming resistor causes inaccurate current limit, potentially leading to premature current foldback or device latch-up. Confirm ILIM voltage and resistor values carefully during design and bench testing.