FDC6321C vs SSM6N67NU,LF: Component Comparison for Power Switching Applications
Quick verdict
For low-voltage, low-current switching where complementary N- and P-channel devices are needed in a compact package, the FDC6321C is the better choice due to its integrated N/P pair and very low input capacitance. For higher-current applications requiring robust conduction up to 4A and improved thermal dissipation, the SSM6N67NU,LF outperforms by a wide margin, despite its larger input capacitance and single polarity.
Spec comparison table
| Spec | FDC6321C | SSM6N67NU,LF | Notes |
|---|---|---|---|
| Configuration | 1 N-Channel + 1 P-Channel | 2 N-Channel | FDC6321C supports complementary switches, SSM6N67NU is dual N-channel only. |
| Continuous Drain Current (Id @ 25°C) | 680mA (N), 460mA (P) | 4A per channel (Ta) | SSM6N67NU supports ~6x higher current; critical for load-driving capability. |
| Max Drain-Source Voltage (Vds) | 25 V | 30 V | SSM6N67NU has 20% higher voltage rating, useful for slightly higher voltage rails. |
| Fet Feature | Logic Level Gate | Logic Level Gate, 1.8V drive | SSM6N67NU supports lower gate drive voltage, better for low-voltage logic interfaces. |
| Gate Charge (Qg @ 4.5-5 V) | 2.3 nC @ 5V | 3.2 nC @ 4.5V | Lower gate charge in FDC6321C reduces switching losses and gate driver stress. |
| Input Capacitance (Ciss @ Vds) | 50 pF @ 10 V | 310 pF @ 15 V | FDC6321C’s much lower input capacitance reduces switching losses and EMI at high speeds. |
| Mounting Type | Surface Mount | Surface Mount | Both are surface mount, but package differs (see below). |
| Operating Temperature Range (TJ) | -55°C to 150°C | Up to 150°C | Comparable thermal ranges. |
| Package Case | SuperSOT™-6 (TSOT-23-6 Thin) | 6-WDFN Exposed Pad (2x2 mm) | SSM6N67NU’s exposed pad improves thermal dissipation; FDC6321C is smaller but less thermally efficient. |
| Max Power Dissipation (Ta) | 700 mW | 2 W | SSM6N67NU supports nearly 3x higher dissipation, important for high current or continuous operation. |
| RDS(on) (max) @ Id and Vgs | 450 mΩ @ 500mA, 4.5V | 39.1 mΩ @ 2A, 4.5V | SSM6N67NU’s RDS(on) is an order of magnitude lower at higher current, greatly reducing conduction losses. |
| Supplier Device Package | SuperSOT™-6 | 6-µDFN (2x2) | Different footprints; SSM6N67NU’s package is thermally superior but larger footprint. |
| Technology | MOSFET (Metal Oxide) | MOSFET (Metal Oxide) | Equivalent technology. |
| Gate Threshold Voltage (Vgs_th) | 1.5 V @ 250 µA | 1 V @ 1 mA | SSM6N67NU has lower threshold voltage, easier to drive fully on at lower gate voltages. |
Design trade-offs
The most striking difference between these two MOSFET arrays is current handling and package thermal characteristics. The SSM6N67NU,LF is designed for significantly higher current loads (4A vs. sub-1A for FDC6321C) and can dissipate nearly 3 times the power. This makes it suitable for medium-power switching or load driving, especially where thermal management is critical. Its exposed pad 6-WDFN package aids heat sinking, which means less derating or thermal resistance in the PCB design.
In contrast, the FDC6321C integrates an N- and P-channel device in a very compact TSOT-23-6 package, targeting low-current complementary switching. Its extremely low input capacitance (50pF) and gate charge (2.3nC) make it ideal for fast switching with minimal gate driver losses. The logic-level gate threshold is slightly higher (1.5V) than the SSM6N67NU’s 1V, but both are compatible with 3.3V or 5V logic. The P-channel device integration is a key differentiator, enabling simplified complementary switch designs (e.g., push-pull or load switching) without external P-MOSFETs.
The SSM6N67NU trades off input capacitance (310pF) and gate charge (3.2nC) for a much lower RDS(on) of 39mΩ at 2A, which translates to far lower conduction losses at moderate to high currents. This capacitance difference means gate drive currents will be higher, which can affect switching speed and driver selection in high-frequency applications. The exposed pad package requires a well-designed thermal pad and PCB copper area for optimal heat sinking, increasing layout complexity but enabling higher power dissipation.
From a firmware or gate driver perspective, the lower gate threshold and higher gate charge of the SSM6N67NU mean the driver must source more current during switching transitions but can switch fully on at lower voltages. The FDC6321C’s lower gate charge reduces driver load but its complementary configuration may require separate gate drives for N and P devices with care to avoid shoot-through.
Cost-wise, the FDC6321C’s smaller package and lower current rating typically translate to lower BOM cost, especially in high volume. The SSM6N67NU’s superior conduction and thermal performance come at a price premium and added layout complexity. For designs requiring simple low-side or high-side switching with minimal current, the FDC6321C is more economical.
Use-case fit
Choose FDC6321C when…
- You need a complementary N- and P-channel MOSFET pair in a single package for low-current load switching (e.g., signal-level load switching up to ~500mA).
- PCB space is constrained and a very small footprint is required (TSOT-23-6).
- You want to minimize gate driver complexity and losses in low-voltage logic-level switching.
- Your design operates below 1A continuous load and power dissipation is under 700mW.
- You need to implement push-pull or synchronous load switching in low-voltage battery-powered devices.
Choose SSM6N67NU,LF when…
- Your load current demand is significantly higher (up to 4A continuous), such as powering motors, solenoids, or medium power DC-DC converters.
- Thermal dissipation is a concern and you can benefit from the exposed pad 6-WDFN package for improved heat sinking.
- Your system logic voltage can go down to 1.8V gate drive, enabling lower power gate drive circuits.
- You require very low conduction losses at moderate currents (sub-50mΩ RDS(on) at 2A).
- Your design can accommodate a slightly larger footprint and more complex PCB layout for thermal management.
Drop-in compatibility
These two devices are not pin-for-pin or footprint compatible. The FDC6321C uses a SuperSOT-23-6 package, which is a very small thin SOT-23 style with 6 leads arranged for a complementary N/P pair. The SSM6N67NU,LF comes in a 6-lead 2x2 mm WDFN package with an exposed thermal pad, designed for dual N-channel MOSFETs.
Substituting one for the other will require a PCB redesign to accommodate the different package outlines, pin assignments, and thermal pad requirements. Additionally, the difference in transistor configuration (N/P pair vs dual N) means circuit topology and gate driving logic will likely need adjustment.
Alternatives to consider
- Si2333CDS (Vishay): Small dual N- and P-channel MOSFETs in SOT-23, suitable for low-current complementary switching with good balance of RDS(on) and gate charge.
- BSS138 (ON Semiconductor): Single N-channel logic-level MOSFET with very low gate charge, common for low-current switching, though not an array.
- FDN360P (ON Semiconductor): P-channel device with low RDS(on) in a small SOT-23, for complementary pairs with separate N-channel MOSFETs.